PCie Driver Engineer
PCie Driver Engineer Montbonnot (38) Permanent REF : PCIE Back REF : PCIE Location Montbonnot (38) Contract Type Permanent ABOUT KALRAY Kalray is a European leader in hardware acceleration, with full-stack acceleration expertise: from silicon to complete system. Our MPPA® (Massively Parallel Processor Array) architecture is the foundation of Kalray’s processor (30+ patent families, 15+ years of development) and acceleration cards that combine processing power, flexibility, and energy efficiency. Our mission is to deliver open data-efficient hardware accelerators to power next generation of data-intensive, AI-driven systems and infrastructures. We offer off-the-shelf processors, acceleration cards, and specialized processor development. With over 130 employees and presence in France and Romania, Kalray is backed by top-tier investors and publicly listed on Euronext Growth. You’ll be part of a pioneering team that is shaping the future of computing with cutting-edge processor architecture, software-defined solutions, and next-generation acceleration platforms. We offer a fast-paced, inclusive, and collaborative environment where ambitious experienced professionals and young talents can thrive—while enjoying the positive and inspiring lanscape of the Alps or the Côte d’Azur. You can learn more about us on our website, follow us on LinkedIn. You can learn more about us on our website , follow us on LinkedIn. WHAT YOU ‘LL BE DOING: As a PCIe Driver Engineer, you will be responsible for the kernel-level and user-space driver layer that links the host to our custom RISC-V AI accelerator over PCIe. This critical software foundation ensures the correctness and performance of all higher-level components. You will join our AI & Compute team, which is building a full-stack GenAI inference platform, from serving to silicon: LLM Serving → AI Compilation → Runtime / Offload → Optimized AI Kernel Libraries Working at the boundary between hardware and software, you will collaborate closely with hardware, firmware and runtime engineers to deliver a robust, high-performance PCIe communication stack enabling efficient AI workload offloading. Your main responsibilities will include: Leading and contributing to: Develop the kernel-level control plane, including PCIe enumeration, BAR mapping, MSI/MSI-X interrupt handling, IOMMU configuration, and secure user-space device access using VFIO/UIO or custom character drivers. Build the user-space data path for workload offloading using mmap'd doorbells, DMA descriptor and queue rings, zero-copy buffer management, and poll-mode/kernel-bypass submission and completion mechanisms to achieve minimal latency. Design and maintain a clean, stable uAPI/SDK enabling the runtime and offload layers to submit work, map buffers and efficiently retrieve completions. Drive hardware bring-up and validation of new boards and silicon in close collaboration with the hardware and firmware teams. Profile and optimize the end-to-end data path, improving DMA throughput, interrupt versus polling strategies, NUMA awareness, hugepage usage, memory placement and cache coherency. Debug complex issues across the hardware/software boundary, including race conditions, stalls, DMA failures and coherency bugs. Implement robust error handling, automated testing and CI validation to ensure production-quality drivers. Produce clear technical documentation and contribute to the continuous improvement of the software stack. WHAT WE ARE LOOKING FOR: Technical skills: Strong experience in C/C++ and Linux systems programming across both kernel and user space. Solid understanding of PCIe, including enumeration, BARs, configuration space, MSI/MSI-X interrupts and DMA engines (descriptor rings, scatter-gather and coherency). Experience with user-space I/O and kernel-bypass technologies, including VFIO/UIO, mmap'd device memory, IOMMU, hugepages and zero-copy buffer management. Strong experience optimizing high-performance data paths, including poll versus interrupt strategies, latency and throughput tuning, NUMA-aware memory management and profiling tools such as perf and ftrace. Experience with hardware bring-up and low-level debugging using tools such as lspci, dmesg, gdb, logic/protocol analyzers or JTAG. Nice to have: Experience with RISC-V platforms, cross-compilation or embedded Linux environments (Yocto, Buildroot). Experience with DPDK, SPDK, RDMA or similar poll-mode driver frameworks. Familiarity with AI/ML accelerator software stacks or host-to-accelerator communication technologies such as remoteproc, rpmsg or virtio. Contributions to the Linux kernel, open-source drivers or SDKs. Experience with CI/CD and hardware-in-the-loop testing. Profile: MSc or Engineering degree (BAC+5) in Computer Science, Embedded Systems or a related field, or equivalent practical experience. 5+ years of experience developing Linux kernel drivers, low-level systems software or PCIe-based hardware interfaces. Methodical problem-solver with a systematic approach to debugging across the hardware/software boundary. Strong performance intuition with the ability to identify latency, memory and throughput bottlenecks. Systems-thinking mindset, able to reason from silicon through the Linux kernel to user-space runtime. Rigorous approach to software quality, correctness, testing and documentation. Collaborative mindset with a strong sense of ownership and the ability to drive a critical software component from bring-up to production. Comfortable working in an international, fast-evolving startup environment Of course, you might not have all of those required skills! But feel free to apply anyway and explain to us why you believe you are the right person for the job.
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